Roberto Suaya is Chief Scientist with Mentor Graphics corporation working in parasitic extracion on Interconnects. He has worked in Layout Compaction, Topological routing, Silicon Compilation, Technology Migration Intelectual Property and IC design of special purpose architectures. Roberto learned the ropes in VLSI from Carver Mead at Caltech. He worked in academia at Caltech, Stanford, University of Illinois and McGill Univ. Also worked at the research labs of: Fairchild, Schlumberger, SRI International.LETI. He led entrepreneurial activities with Weidlinger Associates and his own company Thunder Software, Portola Valley CA.